mmCM1_CM_DGAM_RAMA_START_CNTL_B 4160 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmCM1_CM_DGAM_RAMA_START_CNTL_B                                                                0x0de0
mmCM1_CM_DGAM_RAMA_START_CNTL_B 5012 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmCM1_CM_DGAM_RAMA_START_CNTL_B                                                                0x0ea6
mmCM1_CM_DGAM_RAMA_START_CNTL_B 4074 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmCM1_CM_DGAM_RAMA_START_CNTL_B                                                                0x0ea6