mmCM1_CM_BLNDGAM_RAMA_START_CNTL_R 5104 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmCM1_CM_BLNDGAM_RAMA_START_CNTL_R                                                             0x0ed4
mmCM1_CM_BLNDGAM_RAMA_START_CNTL_R 4166 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmCM1_CM_BLNDGAM_RAMA_START_CNTL_R                                                             0x0ed4