mmCM1_CM_BLNDGAM_RAMA_END_CNTL2_R_BASE_IDX 5123 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmCM1_CM_BLNDGAM_RAMA_END_CNTL2_R_BASE_IDX                                                     2
mmCM1_CM_BLNDGAM_RAMA_END_CNTL2_R_BASE_IDX 4185 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmCM1_CM_BLNDGAM_RAMA_END_CNTL2_R_BASE_IDX                                                     2