mmCM1_CM_BLNDGAM_RAMA_END_CNTL2_G 5118 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmCM1_CM_BLNDGAM_RAMA_END_CNTL2_G                                                              0x0edb
mmCM1_CM_BLNDGAM_RAMA_END_CNTL2_G 4180 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmCM1_CM_BLNDGAM_RAMA_END_CNTL2_G                                                              0x0edb