mmCM1_CM_BLNDGAM_RAMA_END_CNTL1_G 5116 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmCM1_CM_BLNDGAM_RAMA_END_CNTL1_G                                                              0x0eda
mmCM1_CM_BLNDGAM_RAMA_END_CNTL1_G 4178 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmCM1_CM_BLNDGAM_RAMA_END_CNTL1_G                                                              0x0eda