mmCM0_CM_SHAPER_LUT_WRITE_EN_MASK_BASE_IDX 4669 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmCM0_CM_SHAPER_LUT_WRITE_EN_MASK_BASE_IDX                                                     2
mmCM0_CM_SHAPER_LUT_WRITE_EN_MASK_BASE_IDX 3731 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmCM0_CM_SHAPER_LUT_WRITE_EN_MASK_BASE_IDX                                                     2