mmCM0_CM_ICSC_CONTROL 3628 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmCM0_CM_ICSC_CONTROL                                                                          0x0ca9
mmCM0_CM_ICSC_CONTROL 4374 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmCM0_CM_ICSC_CONTROL                                                                          0x0d1b
mmCM0_CM_ICSC_CONTROL 3436 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmCM0_CM_ICSC_CONTROL                                                                          0x0d1b