mmCM0_CM_HDR_MULT_COEF_BASE_IDX 3889 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmCM0_CM_HDR_MULT_COEF_BASE_IDX                                                                2
mmCM0_CM_HDR_MULT_COEF_BASE_IDX 4643 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmCM0_CM_HDR_MULT_COEF_BASE_IDX                                                                2
mmCM0_CM_HDR_MULT_COEF_BASE_IDX 3705 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmCM0_CM_HDR_MULT_COEF_BASE_IDX                                                                2