mmCM0_CM_DGAM_RAMB_SLOPE_CNTL_G_BASE_IDX 3733 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmCM0_CM_DGAM_RAMB_SLOPE_CNTL_G_BASE_IDX                                                       2
mmCM0_CM_DGAM_RAMB_SLOPE_CNTL_G_BASE_IDX 4487 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmCM0_CM_DGAM_RAMB_SLOPE_CNTL_G_BASE_IDX                                                       2
mmCM0_CM_DGAM_RAMB_SLOPE_CNTL_G_BASE_IDX 3549 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmCM0_CM_DGAM_RAMB_SLOPE_CNTL_G_BASE_IDX                                                       2