mmCM0_CM_DGAM_RAMB_END_CNTL1_R 3744 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmCM0_CM_DGAM_RAMB_END_CNTL1_R                                                                 0x0ce3
mmCM0_CM_DGAM_RAMB_END_CNTL1_R 4498 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmCM0_CM_DGAM_RAMB_END_CNTL1_R                                                                 0x0d59
mmCM0_CM_DGAM_RAMB_END_CNTL1_R 3560 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmCM0_CM_DGAM_RAMB_END_CNTL1_R                                                                 0x0d59