mmCM0_CM_DGAM_RAMB_END_CNTL1_G 3740 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmCM0_CM_DGAM_RAMB_END_CNTL1_G                                                                 0x0ce1
mmCM0_CM_DGAM_RAMB_END_CNTL1_G 4494 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmCM0_CM_DGAM_RAMB_END_CNTL1_G                                                                 0x0d57
mmCM0_CM_DGAM_RAMB_END_CNTL1_G 3556 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmCM0_CM_DGAM_RAMB_END_CNTL1_G                                                                 0x0d57