mmCM0_CM_DGAM_RAMA_SLOPE_CNTL_R 3694 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmCM0_CM_DGAM_RAMA_SLOPE_CNTL_R                                                                0x0cca
mmCM0_CM_DGAM_RAMA_SLOPE_CNTL_R 4448 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmCM0_CM_DGAM_RAMA_SLOPE_CNTL_R                                                                0x0d40
mmCM0_CM_DGAM_RAMA_SLOPE_CNTL_R 3510 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmCM0_CM_DGAM_RAMA_SLOPE_CNTL_R                                                                0x0d40