mmCM0_CM_DGAM_RAMA_SLOPE_CNTL_G 3692 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmCM0_CM_DGAM_RAMA_SLOPE_CNTL_G                                                                0x0cc9
mmCM0_CM_DGAM_RAMA_SLOPE_CNTL_G 4446 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmCM0_CM_DGAM_RAMA_SLOPE_CNTL_G                                                                0x0d3f
mmCM0_CM_DGAM_RAMA_SLOPE_CNTL_G 3508 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmCM0_CM_DGAM_RAMA_SLOPE_CNTL_G                                                                0x0d3f