mmCM0_CM_BLNDGAM_RAMB_END_CNTL1_G 4600 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmCM0_CM_BLNDGAM_RAMB_END_CNTL1_G                                                              0x0d8c
mmCM0_CM_BLNDGAM_RAMB_END_CNTL1_G 3662 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmCM0_CM_BLNDGAM_RAMB_END_CNTL1_G                                                              0x0d8c