mmCM0_CM_BLNDGAM_RAMA_END_CNTL2_R 4548 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmCM0_CM_BLNDGAM_RAMA_END_CNTL2_R                                                              0x0d72
mmCM0_CM_BLNDGAM_RAMA_END_CNTL2_R 3610 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmCM0_CM_BLNDGAM_RAMA_END_CNTL2_R                                                              0x0d72