mmCM0_CM_BLNDGAM_RAMA_END_CNTL2_G 4544 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmCM0_CM_BLNDGAM_RAMA_END_CNTL2_G                                                              0x0d70
mmCM0_CM_BLNDGAM_RAMA_END_CNTL2_G 3606 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmCM0_CM_BLNDGAM_RAMA_END_CNTL2_G                                                              0x0d70