mmCM0_CM_BLNDGAM_RAMA_END_CNTL1_B 4538 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmCM0_CM_BLNDGAM_RAMA_END_CNTL1_B                                                              0x0d6d
mmCM0_CM_BLNDGAM_RAMA_END_CNTL1_B 3600 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmCM0_CM_BLNDGAM_RAMA_END_CNTL1_B                                                              0x0d6d