mmCLKREQB_PAD_CNTL  622 drivers/gpu/drm/amd/include/asic_reg/bif/bif_3_0_d.h #define mmCLKREQB_PAD_CNTL 0x1521
mmCLKREQB_PAD_CNTL   51 drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_d.h #define mmCLKREQB_PAD_CNTL                                                      0x1521
mmCLKREQB_PAD_CNTL   59 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_d.h #define mmCLKREQB_PAD_CNTL                                                      0x1521
mmCLKREQB_PAD_CNTL   52 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_1_d.h #define mmCLKREQB_PAD_CNTL                                                      0x1521
mmCLKREQB_PAD_CNTL  815 drivers/gpu/drm/amd/include/asic_reg/nbif/nbif_6_1_offset.h #define mmCLKREQB_PAD_CNTL                                                                             0x0e18 // duplicate 
mmCLKREQB_PAD_CNTL  458 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_2_3_offset.h #define mmCLKREQB_PAD_CNTL                                                                             0x00f8
mmCLKREQB_PAD_CNTL 2464 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_6_1_offset.h #define mmCLKREQB_PAD_CNTL                                                                             0x00f8
mmCLKREQB_PAD_CNTL 4346 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_0_offset.h #define mmCLKREQB_PAD_CNTL                                                                             0x00f8
mmCLKREQB_PAD_CNTL 2786 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_4_offset.h #define mmCLKREQB_PAD_CNTL                                                                             0x00f8