mmCGTT_SC_CLK_CTRL0_BASE_IDX 10115 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCGTT_SC_CLK_CTRL0_BASE_IDX                                                                   1
mmCGTT_SC_CLK_CTRL0_BASE_IDX 6493 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCGTT_SC_CLK_CTRL0_BASE_IDX                                                                   1
mmCGTT_SC_CLK_CTRL0_BASE_IDX 6737 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCGTT_SC_CLK_CTRL0_BASE_IDX                                                                   1
mmCGTT_SC_CLK_CTRL0_BASE_IDX 6755 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCGTT_SC_CLK_CTRL0_BASE_IDX                                                                   1