mmCGTS_RD_REG    9892 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCGTS_RD_REG                                                                                  0x5009
mmCGTS_RD_REG    6280 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCGTS_RD_REG                                                                                  0x5002
mmCGTS_RD_REG    6524 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCGTS_RD_REG                                                                                  0x5002
mmCGTS_RD_REG    6536 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCGTS_RD_REG                                                                                  0x5002
mmCGTS_RD_REG     297 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h #define mmCGTS_RD_REG 0x2456
mmCGTS_RD_REG    1482 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h #define mmCGTS_RD_REG                                                           0xf002
mmCGTS_RD_REG    1503 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h #define mmCGTS_RD_REG                                                           0xf002
mmCGTS_RD_REG    1696 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h #define mmCGTS_RD_REG                                                           0xf002
mmCGTS_RD_REG    1664 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h #define mmCGTS_RD_REG                                                           0xf002