mmCGTS_CU5_SP1_CTRL_REG 6342 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCGTS_CU5_SP1_CTRL_REG                                                                        0x5024
mmCGTS_CU5_SP1_CTRL_REG 6586 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCGTS_CU5_SP1_CTRL_REG                                                                        0x5024
mmCGTS_CU5_SP1_CTRL_REG 6598 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCGTS_CU5_SP1_CTRL_REG                                                                        0x5024
mmCGTS_CU5_SP1_CTRL_REG 1513 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h #define mmCGTS_CU5_SP1_CTRL_REG                                                 0xf024
mmCGTS_CU5_SP1_CTRL_REG 1534 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h #define mmCGTS_CU5_SP1_CTRL_REG                                                 0xf024
mmCGTS_CU5_SP1_CTRL_REG 1727 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h #define mmCGTS_CU5_SP1_CTRL_REG                                                 0xf024
mmCGTS_CU5_SP1_CTRL_REG 1695 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h #define mmCGTS_CU5_SP1_CTRL_REG                                                 0xf024