mmCGTS_CU1_SP1_CTRL_REG_BASE_IDX 6303 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCGTS_CU1_SP1_CTRL_REG_BASE_IDX                                                               1
mmCGTS_CU1_SP1_CTRL_REG_BASE_IDX 6547 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCGTS_CU1_SP1_CTRL_REG_BASE_IDX                                                               1
mmCGTS_CU1_SP1_CTRL_REG_BASE_IDX 6559 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCGTS_CU1_SP1_CTRL_REG_BASE_IDX                                                               1