mmCGTS_CU10_SP1_CTRL_REG_BASE_IDX 6393 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCGTS_CU10_SP1_CTRL_REG_BASE_IDX                                                              1
mmCGTS_CU10_SP1_CTRL_REG_BASE_IDX 6637 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCGTS_CU10_SP1_CTRL_REG_BASE_IDX                                                              1
mmCGTS_CU10_SP1_CTRL_REG_BASE_IDX 6649 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCGTS_CU10_SP1_CTRL_REG_BASE_IDX                                                              1