mmCC_RB_BACKEND_DISABLE_BASE_IDX 2845 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCC_RB_BACKEND_DISABLE_BASE_IDX                                                               0
mmCC_RB_BACKEND_DISABLE_BASE_IDX  931 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCC_RB_BACKEND_DISABLE_BASE_IDX                                                               0
mmCC_RB_BACKEND_DISABLE_BASE_IDX  901 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCC_RB_BACKEND_DISABLE_BASE_IDX                                                               0
mmCC_RB_BACKEND_DISABLE_BASE_IDX  867 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCC_RB_BACKEND_DISABLE_BASE_IDX                                                               0