mmCB_HW_CONTROL_BASE_IDX 2957 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCB_HW_CONTROL_BASE_IDX                                                                       0
mmCB_HW_CONTROL_BASE_IDX 1039 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCB_HW_CONTROL_BASE_IDX                                                                       0
mmCB_HW_CONTROL_BASE_IDX 1009 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCB_HW_CONTROL_BASE_IDX                                                                       0
mmCB_HW_CONTROL_BASE_IDX  975 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCB_HW_CONTROL_BASE_IDX                                                                       0