mmCB_HW_CONTROL_2_BASE_IDX 2961 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCB_HW_CONTROL_2_BASE_IDX                                                                     0
mmCB_HW_CONTROL_2_BASE_IDX 1043 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCB_HW_CONTROL_2_BASE_IDX                                                                     0
mmCB_HW_CONTROL_2_BASE_IDX 1013 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCB_HW_CONTROL_2_BASE_IDX                                                                     0
mmCB_HW_CONTROL_2_BASE_IDX  979 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCB_HW_CONTROL_2_BASE_IDX                                                                     0