mmCB_DCC_CONTROL_BASE_IDX 5989 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCB_DCC_CONTROL_BASE_IDX                                                                      1
mmCB_DCC_CONTROL_BASE_IDX 3587 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCB_DCC_CONTROL_BASE_IDX                                                                      1
mmCB_DCC_CONTROL_BASE_IDX 3839 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCB_DCC_CONTROL_BASE_IDX                                                                      1
mmCB_DCC_CONTROL_BASE_IDX 3789 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCB_DCC_CONTROL_BASE_IDX                                                                      1