mmBL_PWM_GRP1_REG_LOCK 1576 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h #define mmBL_PWM_GRP1_REG_LOCK                                                  0x4823
mmBL_PWM_GRP1_REG_LOCK 1401 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h #define mmBL_PWM_GRP1_REG_LOCK                                                  0x4823
mmBL_PWM_GRP1_REG_LOCK 1481 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h #define mmBL_PWM_GRP1_REG_LOCK                                                  0x4823
mmBL_PWM_GRP1_REG_LOCK 1866 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmBL_PWM_GRP1_REG_LOCK                                                                         0x20a1
mmBL_PWM_GRP1_REG_LOCK  477 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_d.h #define mmBL_PWM_GRP1_REG_LOCK 0x1921
mmBL_PWM_GRP1_REG_LOCK 1289 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_d.h #define mmBL_PWM_GRP1_REG_LOCK                                                  0x1921
mmBL_PWM_GRP1_REG_LOCK 10409 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmBL_PWM_GRP1_REG_LOCK                                                                         0x288b
mmBL_PWM_GRP1_REG_LOCK 12780 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmBL_PWM_GRP1_REG_LOCK                                                                         0x288b
mmBL_PWM_GRP1_REG_LOCK 11354 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmBL_PWM_GRP1_REG_LOCK                                                                         0x288b