mmBL1_PWM_CURRENT_ABM_LEVEL_BASE_IDX 1309 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmBL1_PWM_CURRENT_ABM_LEVEL_BASE_IDX                                                           2
mmBL1_PWM_CURRENT_ABM_LEVEL_BASE_IDX 8169 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmBL1_PWM_CURRENT_ABM_LEVEL_BASE_IDX                                                           2
mmBL1_PWM_CURRENT_ABM_LEVEL_BASE_IDX 7139 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmBL1_PWM_CURRENT_ABM_LEVEL_BASE_IDX                                                           2