mmBIF_UVD_INTR_CNTL  621 drivers/gpu/drm/amd/include/asic_reg/nbif/nbif_6_1_offset.h #define mmBIF_UVD_INTR_CNTL                                                                            0x0062 // duplicate 
mmBIF_UVD_INTR_CNTL   94 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_2_3_offset.h #define mmBIF_UVD_INTR_CNTL                                                                            0x004e
mmBIF_UVD_INTR_CNTL 2196 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_6_1_offset.h #define mmBIF_UVD_INTR_CNTL                                                                            0x004e
mmBIF_UVD_INTR_CNTL 4080 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_0_offset.h #define mmBIF_UVD_INTR_CNTL                                                                            0x004e
mmBIF_UVD_INTR_CNTL 2516 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_4_offset.h #define mmBIF_UVD_INTR_CNTL                                                                            0x004e