mmBACO_CNTL_BASE_IDX  844 drivers/gpu/drm/amd/include/asic_reg/nbif/nbif_6_1_offset.h #define mmBACO_CNTL_BASE_IDX                                                                           0
mmBACO_CNTL_BASE_IDX  475 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_2_3_offset.h #define mmBACO_CNTL_BASE_IDX                                                                           2
mmBACO_CNTL_BASE_IDX 2481 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_6_1_offset.h #define mmBACO_CNTL_BASE_IDX                                                                           2
mmBACO_CNTL_BASE_IDX 4363 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_0_offset.h #define mmBACO_CNTL_BASE_IDX                                                                           2
mmBACO_CNTL_BASE_IDX 2803 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_4_offset.h #define mmBACO_CNTL_BASE_IDX                                                                           2