mmAZALIA_SOCCLK_CONTROL_BASE_IDX 1475 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmAZALIA_SOCCLK_CONTROL_BASE_IDX                                                               2
mmAZALIA_SOCCLK_CONTROL_BASE_IDX 1797 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmAZALIA_SOCCLK_CONTROL_BASE_IDX                                                               2
mmAZALIA_SOCCLK_CONTROL_BASE_IDX 1441 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmAZALIA_SOCCLK_CONTROL_BASE_IDX                                                               2
mmAZALIA_SOCCLK_CONTROL_BASE_IDX 1403 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmAZALIA_SOCCLK_CONTROL_BASE_IDX                                                               2