mmAZALIA_F0_CODEC_FUNCTION_CONTROL_RESET_BASE_IDX 1561 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmAZALIA_F0_CODEC_FUNCTION_CONTROL_RESET_BASE_IDX                                              2
mmAZALIA_F0_CODEC_FUNCTION_CONTROL_RESET_BASE_IDX 1887 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmAZALIA_F0_CODEC_FUNCTION_CONTROL_RESET_BASE_IDX                                              2
mmAZALIA_F0_CODEC_FUNCTION_CONTROL_RESET_BASE_IDX 1531 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmAZALIA_F0_CODEC_FUNCTION_CONTROL_RESET_BASE_IDX                                              2
mmAZALIA_F0_CODEC_FUNCTION_CONTROL_RESET_BASE_IDX 1493 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmAZALIA_F0_CODEC_FUNCTION_CONTROL_RESET_BASE_IDX                                              2