mmAZALIA_CRC1_CONTROL2_BASE_IDX 1533 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmAZALIA_CRC1_CONTROL2_BASE_IDX                                                                2
mmAZALIA_CRC1_CONTROL2_BASE_IDX 1855 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmAZALIA_CRC1_CONTROL2_BASE_IDX                                                                2
mmAZALIA_CRC1_CONTROL2_BASE_IDX 1499 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmAZALIA_CRC1_CONTROL2_BASE_IDX                                                                2
mmAZALIA_CRC1_CONTROL2_BASE_IDX 1461 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmAZALIA_CRC1_CONTROL2_BASE_IDX                                                                2