mmAZALIA_CRC0_CONTROL3_BASE_IDX 1525 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmAZALIA_CRC0_CONTROL3_BASE_IDX                                                                2
mmAZALIA_CRC0_CONTROL3_BASE_IDX 1847 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmAZALIA_CRC0_CONTROL3_BASE_IDX                                                                2
mmAZALIA_CRC0_CONTROL3_BASE_IDX 1491 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmAZALIA_CRC0_CONTROL3_BASE_IDX                                                                2
mmAZALIA_CRC0_CONTROL3_BASE_IDX 1453 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmAZALIA_CRC0_CONTROL3_BASE_IDX                                                                2