mmAZALIA_CONTROLLER_CLOCK_GATING_BASE_IDX 1469 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmAZALIA_CONTROLLER_CLOCK_GATING_BASE_IDX                                                      2
mmAZALIA_CONTROLLER_CLOCK_GATING_BASE_IDX 1791 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmAZALIA_CONTROLLER_CLOCK_GATING_BASE_IDX                                                      2
mmAZALIA_CONTROLLER_CLOCK_GATING_BASE_IDX 1435 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmAZALIA_CONTROLLER_CLOCK_GATING_BASE_IDX                                                      2
mmAZALIA_CONTROLLER_CLOCK_GATING_BASE_IDX 1397 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmAZALIA_CONTROLLER_CLOCK_GATING_BASE_IDX                                                      2