mmATC_L2_CNTL3_BASE_IDX 1138 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmATC_L2_CNTL3_BASE_IDX                                                                        0
mmATC_L2_CNTL3_BASE_IDX 1171 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmATC_L2_CNTL3_BASE_IDX                                                                        0
mmATC_L2_CNTL3_BASE_IDX 1109 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmATC_L2_CNTL3_BASE_IDX                                                                        0
mmATC_L2_CNTL3_BASE_IDX 1249 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_1_0_offset.h #define mmATC_L2_CNTL3_BASE_IDX                                                                        0
mmATC_L2_CNTL3_BASE_IDX 1281 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_9_1_offset.h #define mmATC_L2_CNTL3_BASE_IDX                                                                        0
mmATC_L2_CNTL3_BASE_IDX 1265 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_9_3_0_offset.h #define mmATC_L2_CNTL3_BASE_IDX                                                                        0