BIF_CFG_DEV0_EPF0_VF1_1_DEVICE_CNTL__MAX_READ_REQUEST_SIZE__SHIFT 99621 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_2_3_sh_mask.h #define BIF_CFG_DEV0_EPF0_VF1_1_DEVICE_CNTL__MAX_READ_REQUEST_SIZE__SHIFT                                     0xc
BIF_CFG_DEV0_EPF0_VF1_1_DEVICE_CNTL__MAX_READ_REQUEST_SIZE__SHIFT 27531 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_6_1_sh_mask.h #define BIF_CFG_DEV0_EPF0_VF1_1_DEVICE_CNTL__MAX_READ_REQUEST_SIZE__SHIFT                                     0xc