cfgPSWUSCFG0_PCIE_LTR_ENH_CAP_LIST  152 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_6_1_offset.h #define cfgPSWUSCFG0_PCIE_LTR_ENH_CAP_LIST                                                              0x0320
cfgPSWUSCFG0_PCIE_LTR_ENH_CAP_LIST  152 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_4_offset.h #define cfgPSWUSCFG0_PCIE_LTR_ENH_CAP_LIST                                                              0x0320