cfgPSWUSCFG0_PCIE_DEV_SERIAL_NUM_ENH_CAP_LIST   99 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_6_1_offset.h #define cfgPSWUSCFG0_PCIE_DEV_SERIAL_NUM_ENH_CAP_LIST                                                   0x0140
cfgPSWUSCFG0_PCIE_DEV_SERIAL_NUM_ENH_CAP_LIST   99 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_4_offset.h #define cfgPSWUSCFG0_PCIE_DEV_SERIAL_NUM_ENH_CAP_LIST                                                   0x0140