cfgPSWUSCFG0_IRQ_BRIDGE_CNTL   51 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_6_1_offset.h #define cfgPSWUSCFG0_IRQ_BRIDGE_CNTL                                                                    0x003e
cfgPSWUSCFG0_IRQ_BRIDGE_CNTL   51 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_4_offset.h #define cfgPSWUSCFG0_IRQ_BRIDGE_CNTL                                                                    0x003e