cfgPSWUSCFG0_IO_BASE_LIMIT_HI   47 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_6_1_offset.h #define cfgPSWUSCFG0_IO_BASE_LIMIT_HI                                                                   0x0030
cfgPSWUSCFG0_IO_BASE_LIMIT_HI   47 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_4_offset.h #define cfgPSWUSCFG0_IO_BASE_LIMIT_HI                                                                   0x0030