cfgBIF_CFG_DEV0_SWDS0_LANE_7_MARGINING_LANE_CNTL 2213 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_2_3_offset.h #define cfgBIF_CFG_DEV0_SWDS0_LANE_7_MARGINING_LANE_CNTL                                                0x0464
cfgBIF_CFG_DEV0_SWDS0_LANE_7_MARGINING_LANE_CNTL 1100 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_4_offset.h #define cfgBIF_CFG_DEV0_SWDS0_LANE_7_MARGINING_LANE_CNTL                                                0x0464