cfgBIF_CFG_DEV0_EPF1_0_LANE_15_MARGINING_LANE_CNTL 1567 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_2_3_offset.h #define cfgBIF_CFG_DEV0_EPF1_0_LANE_15_MARGINING_LANE_CNTL                                              0x0484
cfgBIF_CFG_DEV0_EPF1_0_LANE_15_MARGINING_LANE_CNTL  847 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_4_offset.h #define cfgBIF_CFG_DEV0_EPF1_0_LANE_15_MARGINING_LANE_CNTL                                              0x0484