cfgBIF_CFG_DEV0_EPF1_0_LANE_12_MARGINING_LANE_CNTL 1561 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_2_3_offset.h #define cfgBIF_CFG_DEV0_EPF1_0_LANE_12_MARGINING_LANE_CNTL                                              0x0478
cfgBIF_CFG_DEV0_EPF1_0_LANE_12_MARGINING_LANE_CNTL  841 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_4_offset.h #define cfgBIF_CFG_DEV0_EPF1_0_LANE_12_MARGINING_LANE_CNTL                                              0x0478