cfgBIF_CFG_DEV0_EPF1_0_LANE_10_MARGINING_LANE_CNTL 1557 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_2_3_offset.h #define cfgBIF_CFG_DEV0_EPF1_0_LANE_10_MARGINING_LANE_CNTL                                              0x0470
cfgBIF_CFG_DEV0_EPF1_0_LANE_10_MARGINING_LANE_CNTL  837 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_4_offset.h #define cfgBIF_CFG_DEV0_EPF1_0_LANE_10_MARGINING_LANE_CNTL                                              0x0470