cfgBIF_CFG_DEV0_EPF0_0_LANE_10_MARGINING_LANE_STATUS 1205 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_2_3_offset.h #define cfgBIF_CFG_DEV0_EPF0_0_LANE_10_MARGINING_LANE_STATUS                                            0x0472
cfgBIF_CFG_DEV0_EPF0_0_LANE_10_MARGINING_LANE_STATUS  484 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_4_offset.h #define cfgBIF_CFG_DEV0_EPF0_0_LANE_10_MARGINING_LANE_STATUS                                            0x0472