BIF_CFG_DEV0_EPF0_VF15_0_STATUS__CAP_LIST__SHIFT 68325 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_2_3_sh_mask.h #define BIF_CFG_DEV0_EPF0_VF15_0_STATUS__CAP_LIST__SHIFT                                                      0x4
BIF_CFG_DEV0_EPF0_VF15_0_STATUS__CAP_LIST__SHIFT 16027 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_6_1_sh_mask.h #define BIF_CFG_DEV0_EPF0_VF15_0_STATUS__CAP_LIST__SHIFT                                                      0x4
BIF_CFG_DEV0_EPF0_VF15_0_STATUS__CAP_LIST__SHIFT 18848 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_4_sh_mask.h #define BIF_CFG_DEV0_EPF0_VF15_0_STATUS__CAP_LIST__SHIFT                                                      0x4
BIF_CFG_DEV0_EPF0_VF15_0_STATUS__CAP_LIST__SHIFT 41537 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_4_sh_mask.h #define BIF_CFG_DEV0_EPF0_VF15_0_STATUS__CAP_LIST__SHIFT                                                      0x4