BIF_CFG_DEV0_EPF0_VF10_0_STATUS__CAP_LIST__SHIFT 64845 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_2_3_sh_mask.h #define BIF_CFG_DEV0_EPF0_VF10_0_STATUS__CAP_LIST__SHIFT                                                      0x4
BIF_CFG_DEV0_EPF0_VF10_0_STATUS__CAP_LIST__SHIFT 12757 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_6_1_sh_mask.h #define BIF_CFG_DEV0_EPF0_VF10_0_STATUS__CAP_LIST__SHIFT                                                      0x4
BIF_CFG_DEV0_EPF0_VF10_0_STATUS__CAP_LIST__SHIFT 15428 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_4_sh_mask.h #define BIF_CFG_DEV0_EPF0_VF10_0_STATUS__CAP_LIST__SHIFT                                                      0x4
BIF_CFG_DEV0_EPF0_VF10_0_STATUS__CAP_LIST__SHIFT 38117 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_4_sh_mask.h #define BIF_CFG_DEV0_EPF0_VF10_0_STATUS__CAP_LIST__SHIFT                                                      0x4