BIF_CFG_DEV0_EPF0_VF0_1_COMMAND__SERR_EN__SHIFT 98766 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_2_3_sh_mask.h #define BIF_CFG_DEV0_EPF0_VF0_1_COMMAND__SERR_EN__SHIFT                                                       0x8
BIF_CFG_DEV0_EPF0_VF0_1_COMMAND__SERR_EN__SHIFT 26729 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_6_1_sh_mask.h #define BIF_CFG_DEV0_EPF0_VF0_1_COMMAND__SERR_EN__SHIFT                                                       0x8